Conventionally, a power management method has been adopted in a semiconductor device to be mounted on an information processing apparatus for the sake of power saving. In power management, power control that reduces power consumption is performed by causing a semiconductor device including one or two or more hardware circuits (hereinafter referred to as hardware) to transition from an operating state to a standby state.
Generally, an operating state for a semiconductor device refers to a state in which a software program (hereinafter referred to as a program) is executed by a central processing unit (hereinafter referred to as a CPU). A standby state refers to a state in which a piece (pieces) of hardware, such as a CPU, is (are) out of operation, and an interrupt signal is being waited for. For example, when there is a wait for input of an interrupt signal during execution of a program by the CPU, the semiconductor device transitions to the standby state. When an interrupt signal is generated, the piece(s) of hardware out of operation is (are) woken up, and the semiconductor device transitions from the standby state to the operating state.
A time period from when an interrupt signal is generated while the semiconductor device is in the standby state to when the semiconductor device transitions from the standby state to the operating state is a return time period.
A power management method has also been proposed in recent years which has a plurality of standby states and implements more power saving by varying the number of pieces of hardware to be suspended according to the type of standby state. In the power management method, the standby states include a standby state in which a smaller number of pieces of hardware are suspended, i.e., a shallow standby state and a standby state in which a larger number of pieces of hardware are suspended, i.e., a deep standby state. Generally, as for the above-described return time period, a return time period from the deep standby state to an operating state is longer than a return time period from the shallow standby state to the operating state.
There are a plurality of processes (hereinafter to be referred to as tasks) in a program to be executed by a CPU, and the plurality of tasks are different in processing details from each other. For the reason, the plurality of tasks are different from each other in a depth of a standby state, transition to which is possible, and an allowable return time period duration. If a return time period is impermissibly long, a task cannot execute a process corresponding to an interrupt signal.
For power saving, it is preferable to transition to a standby state with lowest possible consumed power, i.e., a deepest possible standby state. However, as described above, a deeper standby state is longer in a return time period from a standby state to an operating state.
For the reason, if a plurality of tasks are executed, a standby state with a short return time period and a safe depth is set as a standby state to be transitioned so as not to cause a system collapse, i.e., so as to ensure operation of hardware at a time of execution of the resumed tasks.
However, if the number of tasks being executed increases or decreases due to, e.g., motion of a program, a return time period of the standby state to be transitioned may be long depending on tasks being executed. Even in the case, the standby state to be transitioned is the set standby state with the short return time period. For the reason, even though a system collapse may not occur depending on tasks being executed, there is a problem that a deeper standby state is not set as the standby state to be transitioned.
The idea of associating the type of an interrupt signal with a depth of a standby state is also conceivable. However, since a change in hardware suspended in a standby state may increase a return time period, definition of a return time period according to the type of an interrupt signal may cause a system collapse.